Chapter 1 — Foundations

The vocabulary questions in Q1(a)/(c): architecture vs organization, abstraction, Moore’s Law, the translation hierarchy, and RISC vs CISC. Short, definition-driven — easy marks.

Architecture vs. Organization

Computer architecture = the attributes visible to a programmer: the instruction set (ISA), number of bits used for data, registers, addressing modes, I/O mechanisms. It answers “what does the machine do?”
Computer organization = the hardware details transparent to the programmer: control signals, buses, the memory technology used, how the pieces are wired. It answers “how is it built?”
Rule of thumb: two machines can share the same architecture (run the same programs) but have a different organization (one faster/cheaper). This is exactly the “same ISA” setup used in the performance questions.

Abstraction

Abstraction hides low-level complexity behind a simpler interface, so a programmer at one level need not understand the level below. Each layer talks only to its neighbours:
High-level language (C, Java)
easiest for humans
compiler
Assembly language
add $s0,$s1,$s2
assembler
Machine language (0101101…)
what the CPU runs
Hardware (transistors, gates)
physical reality
Why it helps: a programmer writing C doesn’t need to know the transistor layout; the compiler writer doesn’t need to know the silicon. Each level is designed and reasoned about independently, which is what lets huge systems be built at all. (This is the answer to “explain how abstraction helps programmers cope with complexity.”)

Moore’s Law

Gordon Moore proposed Moore’s Law in 1965. It states that the number of transistors that can be placed on an integrated-circuit chip doubles approximately every two years.

Three consequences

  1. The cost of computer logic and memory circuitry has fallen at a dramatic rate.
  2. The electrical path length is shortened, increasing operating speed.
  3. The computer becomes smaller and is more convenient to use in a variety of environments.

Memory hook: Cheaper · Faster · Smaller — all because transistors keep doubling.

The Translation Hierarchy (C → running program)

How a C program becomes something the machine executes. Know the chain in order and what each tool does.

C programCompilerAssembly language programAssemblerObject: machine language moduleObject: library routineLinkerlibrary routines join hereExecutable: machine language programLoaderMemory
ToolInput → Output
CompilerC program → Assembly language program
AssemblerAssembly → Object (machine language module)
LinkerObject module + library routines → Executable machine-language program
LoaderExecutable → loaded into Memory to run

Hook: C→A→L→L (Compiler, Assembler, Linker, Loader). The Linker is the one that pulls in library routines.

Levels of Program Code

Exams phrase this as “high / mid / low-level languages”: High-level = C/Java (a = b − c;) → Mid-level = assembly (sub $s0, $s1, $s2) → Low-level = machine code (the binary encoding). This is exactly the Summer-2024 Q3(b) chain for sub $s0, $s1, $s2 (worked in the MIPS chapter).

Instruction Set Architecture: RISC vs. CISC

RISC — Reduced Instruction Set Computing
• Simple, fixed-length instructions
• Examples: ARM, MIPS, PowerPC, RISC-V
CISC — Complex Instruction Set Computing
• Complex, variable-length instructions
• Examples: Intel x86, AMD, IBM System/360

MIPS (the ISA studied in Chapter 2) is a RISC design — that’s why all its instructions are exactly 32 bits.

Hardware Building Block: the Register

A register is built from flip-flops and stores a small fixed number of bits (typically 8 / 16 / 32 bits). On each clock (CLK) edge it captures its input and holds it as the current output. Registers are the fastest storage in the machine and hold the operands the ALU works on.
Also worth a line (embedded systems / IC generations, Summer-24 Q1): an embedded system is a computer built into a larger device (processor + memory + I/O to sensors/actuators, often on one board). The IC “generations” progression is vacuum tube → transistor → small/medium-scale IC → LSI → VLSI → ULSI, each packing more transistors — the physical driver behind Moore’s Law.