🖥️ Computer Architecture
CSE 214 — Moore’s Law, the IAS computer, MIPS, performance, arithmetic, pipelining and caches. Everything for the midterm AND the final.
Chapters
COD Chapter 1 — Foundations Ready
Computer architecture vs organization, abstraction, Moore’s Law, the C translation hierarchy, and RISC vs CISC.
The IAS Computer Ready
von Neumann structure, IAS memory & formats, the full IAS instruction set, and writing IAS assembly + machine code — with a live assembler.
COD Chapter 2 — MIPS Ready
MIPS memory addressing, the R/I/J instruction formats, assembly, the 5 addressing modes, branch offsets — with a live machine-code encoder.
COD Chapter 4 — Performance Ready
Execution time, CPI, the MIPS pitfall, and Amdahl’s Law.
COD Chapter 3 — Arithmetic for Computers Ready
Two’s complement, overflow detection, the multiply & divide algorithms, and IEEE 754 floating point.
Module 5 & 6 — Pipelining Ready
Why pipelining speeds up a processor, the 5 MIPS stages, pipeline registers, the three hazard types and their fixes, and the speedup / latency / throughput arithmetic — with a live pipeline diagram (Final Q2, slide f).
Module 7 — Memory Hierarchy & Cache Ready
The principle of locality, the memory-hierarchy pyramid, direct-mapped caches (tag / index / offset), the total-bits calculation, associativity, and virtual memory — with interactive cache tools (Final Q3, slide g).
Final Exam Prep Ready
The final-exam pattern decoded plus three full past finals (Summer 2025, Autumn 2025, Spring 2024), every question worked out with reveal-able solutions.
Midterm Exam Prep Ready
The exam pattern decoded plus four full past papers (Summer 2024 → Spring 2026), every question worked out with reveal-able solutions.