Final Exam Prep
The final-exam pattern decoded plus three full past finals (Summer 2025, Autumn 2025, Spring 2024), every question worked out with reveal-able solutions.
Sections
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Pattern & Cheat Sheet
How the 30-mark final is built, the mark split, and every formula on one page.
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Summer 2025 — Solved
Multiply algorithm+complexity, overflow, IEEE diagram; structural hazard; pipeline speedup/throughput/latency; direct-mapped cache diagram + bits + associativity.
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Autumn 2025 — Solved
Divide algorithm+complexity, FP overflow/underflow, −6.375 in IEEE 754; pipeline stages + 5-stage timing; locality, cache bits, index size.
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Spring 2024 — Solved
Divide algorithm, multiply hardware, FP in MIPS; pipelining & structural hazard, MIPS stages/datapath; memory hierarchy, direct-mapped diagram, total memory units.
Quick summary
FINAL: CSE 214 · Full marks 30 · 1 hr 30 min · answer all 3 questions · all CO3.
Q1 — ARITHMETIC (Module 4) ~10 marks
(a) devise multiply OR divide algorithm + time/space complexity
(b) overflow detection / FP overflow & underflow / multiply hardware
(c) IEEE 754 single & double: diagram OR compute a representation.
Q2 — PIPELINING (Modules 5 & 6) ~10 marks
(a) define pipelining / a hazard type + example + fix
(b) 5-stage timing: total time · speedup · latency · throughput
(and: name/describe the MIPS stages, draw the datapath).
Q3 — MEMORY & CACHE (Module 7) ~10 marks
(a) principle of locality / memory hierarchy diagram
(b) direct-mapped cache diagram / total-bits calculation
(c) index size from m blocks / degrees of associativity from 2^n entries.
STRATEGY: the same 3-question skeleton repeats every semester. Master one
worked example of each type and you can answer the whole paper. Everything
here maps to a section in the arithmetic, pipelining and cache chapters.