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Final Exam — Pattern & Cheat Sheet

CSE 214 · Full marks 30 · 1 hr 30 min · answer all 3 questions · everything is CO3. The paper is astonishingly consistent — the same three questions appear every semester with new numbers.

1. The three-question skeleton

QModuleTopicWhat they ask
Q14Arithmetic(a) devise multiply or divide algorithm + time/space complexity · (b) overflow detection or FP overflow/underflow · (c) IEEE 754 diagram or compute a value
Q25 & 6Pipelining(a) define pipelining / a hazard + example + fix · (b) 5-stage timing: total time · speedup · latency · throughput (or: name stages / draw datapath)
Q37Memory & Cache(a) locality / hierarchy diagram · (b) direct-mapped diagram / total bits · (c) index size from block counts / degrees of associativity
Each question ≈ 10 marks (10 + 10 + 10 = 30). Master one worked example of each part and you can answer the whole paper. Every part below links to the section that teaches it.

2. Q1 — Arithmetic cheat sheet

IEEE 754 — single: 1+8+231{+}8{+}23, bias 127; double: 1+11+521{+}11{+}52, bias 1023.
value=(−1)s×(1.f)×2(E−bias)\text{value} = (-1)^s \times (1.f) \times 2^{(E - \text{bias})}
Steps: decimal → binary → normalize 1.f×2e1.f\times2^e → stored exp = e + bias → pack.
Overflow (add/sub) — result has the wrong sign: (+)+(+)→(−), (−)+(−)→(+), (+)−(−)→(−), (−)−(+)→(+).
Multiply: n steps, each test-LSB→add→shift; product is 2n2n bits. Time O(n)O(n), space O(n)O(n). Divide: n+1 steps of subtract/restore/shift; time O(n)O(n), space O(n)O(n).

Deep dives: IEEE 754 · overflow · multiply · divide.

3. Q2 — Pipelining cheat sheet

Stages: IF · ID · EX · MEM · WB. Pipeline registers: IF/ID, ID/EX, EX/MEM, MEM/WB.
tc=max⁡(stage times),Σ=∑(stage times)Pipelined total=(k+n−1) tc,Non-pipelined=n ΣSpeedup=nΣ(k+n−1)tc→k,Latencypipe=k tc,  Latencyseq=Σ\begin{aligned} t_c &= \max(\text{stage times}), \quad \Sigma = \sum(\text{stage times}) \\ \text{Pipelined total} &= (k+n-1)\,t_c, \quad \text{Non-pipelined} = n\,\Sigma \\ \text{Speedup} &= \tfrac{n\Sigma}{(k+n-1)t_c} \to k, \quad \text{Latency}_{\text{pipe}} = k\,t_c,\ \ \text{Latency}_{\text{seq}} = \Sigma \end{aligned}
Hazards: structural (duplicate resource) · data (forward, else stall) · control (predict/stall).

Deep dives: timing · hazards · datapath.

4. Q3 — Memory & cache cheat sheet

Address = | tag | index | block offset | byte offset |. byte offset = 2, block offset = log⁡2(words/block)\log_2(\text{words/block}), index = log⁡2(lines)\log_2(\text{lines}), tag = the rest.
lines=capacityblock size,Total bits=lines×(1+tag+words/block×32)\text{lines} = \tfrac{\text{capacity}}{\text{block size}}, \quad \text{Total bits} = \text{lines}\times(1 + \text{tag} + \text{words/block}\times32)
Line = block mod lines. A 2n2^n-block cache has n+1n+1 associativity configs. Locality: temporal (again soon) + spatial (neighbours soon).

Deep dives: total bits · direct-mapped · locality · associativity.

5. Strategy

  • Bank the definitions first. Q1(b), Q2(a), Q3(a) are pure recall — write the overflow table, hazard definition, and locality types from memory for guaranteed marks.
  • Show every step in the calculations (Q2b, Q3b) — partial credit is real.
  • Draw the diagrams — IEEE format, pipeline staircase, memory pyramid, and the cache address split are quick marks if you've practised them.
  • Work all three solved papers here: Summer 2025 · Autumn 2025 · Spring 2024.