The IAS Computer
von Neumann structure, IAS memory & formats, the full IAS instruction set, and writing IAS assembly + machine code — with a live assembler.
Sections
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Structure
von Neumann model + full IAS block diagram with all registers.
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Memory & Formats
Word size, address formulas, capacity, and the data/instruction formats.
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Instruction Set
The complete IAS instruction table — every opcode and meaning.
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Assembly & Machine Code
Worked exam programs: symbolic code + machine encoding, step by step.
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Live IAS Assembler
Type IAS assembly, get the machine code instantly.
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Practice
IAS exam problems with reveal-able solutions.
Quick summary
von NEUMANN parts: Main Memory (M) · CPU = ALU(CA) + Control(CC) · I/O.
IAS registers: AC (accumulator) · MQ · MBR · IBR · PC · MAR · IR.
MEMORY: 4096 words × 40 bits. Address = log2(4096) = 12 bits.
Total = 40 × 2^12 bits = 163,840 bits = 20,480 bytes = 4096 words.
rows = 2^(addr bits) ; addr bits = log2(rows).
WORD = 40 bits. Number = 1 sign bit + 39 magnitude bits.
INSTRUCTION word = TWO instrs: [opcode 8 | address 12][opcode 8 | address 12].
ACCUMULATOR programming:
LOAD M(X) AC=M(X) ADD M(X) AC=AC+M(X)
SUB M(X) AC=AC−M(X) STOR M(X) M(X)=AC
Opcodes: LOAD=00000001 ADD=00000101 SUB=00000110 STOR=00100001.