Module 7 โ Memory Hierarchy & Cache
The principle of locality, the memory-hierarchy pyramid, direct-mapped caches (tag / index / offset), the total-bits calculation, associativity, and virtual memory โ with interactive cache tools (Final Q3, slide g).
Sections
Locality & Hierarchy
Temporal & spatial locality, the memory-hierarchy pyramid, and hit/miss terminology.
Direct-Mapped Cache
How a block maps to a line, the tag/index/offset address split, and the hit test โ with a live address decoder.
Total-Bits Calculation
The exact "how many total bits?" question worked step-by-step, plus a live calculator.
Associativity
Direct-mapped vs set-associative vs fully associative, and the number-of-configurations rule.
Virtual Memory
Pages, page tables, page faults and how virtual addresses translate to physical ones.
Practice
Cache & memory exam problems with reveal-able solutions.
Assignment 1 โ Solved
Locality, a 256-block direct-mapped cache diagram, total bits for a 512 KB cache + address split, and why set associativity cuts the miss rate.
Quick summary
LOCALITY โ why a hierarchy works: TEMPORAL โ a referenced item is likely referenced again soon (loops). SPATIAL โ items near a referenced one are likely used soon (arrays) โ blocks. MEMORY HIERARCHY: registers โ cache(SRAM) โ main memory(DRAM) โ disk. Down the pyramid: bigger, slower, cheaper per bit. HIT = found in this level. MISS = not found, fetch from the level below. ADDRESS SPLIT (direct-mapped, byte address): | TAG | INDEX | BLOCK OFFSET | BYTE OFFSET | block offset bits = log2(words per block) ; byte offset = 2 (4 bytes/word) index bits = log2(number of cache lines) tag bits = address bits โ index โ block offset โ byte offset Cache line chosen = (block address) mod (number of lines). TOTAL BITS per line = valid(1) + tag + data. Total = lines ร (1 + tag + data). ASSOCIATIVITY: Direct-mapped โ 1 place per block (index). 1-way. Set-associativeโ block maps to a SET of n lines. n-way. Fully associative โ block goes anywhere (all tag). no index. A 2^n-block cache has (n+1) configurations of associativity. VIRTUAL MEMORY: disk backs main memory; address = virtual page # + page offset; a PAGE TABLE maps virtual pages โ physical frames (a miss = page fault).