Exam-pattern questions across locality, direct-mapped caches, bits, and associativity.
Locality & hierarchy
M-1smallState the two types of locality with an example of each.
Temporal โ a referenced item is likely used again soon (e.g. a loop variable). Spatial โ items near a referenced one are likely used soon (e.g. array elements, the next instruction). Together they justify caching blocks of recently-used data.
M-2smallDown the memory hierarchy, what happens to size, speed and cost per bit?
As you move away from the CPU: size increases, speed decreases (access time grows), and cost per bit decreases.
Direct-mapped caches
M-3smallAn 8-line direct-mapped cache. Which line do memory blocks 12 and 20 map to, and what's the problem?
12mod8=4 and 20mod8=4 โ both map to line 4. Problem: they conflict; only one can be cached at a time, so alternating accesses keep evicting each other (a conflict miss).
M-4big32-bit address, direct-mapped cache with 1024 one-word lines. Split the address and give the hit condition.
byte offset = 2, block offset = 0 (1-word block), index = log2โ1024=10, tag = 32โ10โ2=20. Hit โ valid = 1 AND stored tag = address tag.
Total bits
M-5bigHow many total bits for a direct-mapped cache with 16 KB of data, 4-word blocks, 32-bit address? (COD/slide example)
Block = 4 words = 16 B = 24. Lines = 16KB/16B=1024. block offset = log2โ4=2, byte offset = 2, index = 10, tag = 32โ10โ2โ2=18.