COD Chapter 2 — MIPS
MIPS memory addressing, the R/I/J instruction formats, assembly, the 5 addressing modes, branch offsets — with a live machine-code encoder.
Sections
🗂️
Memory Addressing
Byte vs word addressing, alignment, last byte/word, MIPS-32 vs 64.
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Instruction Formats
R, I and J formats — every field, bit width and when each is used.
⌨️
Assembly & C→MIPS
Instruction reference, register table, and translating C (if/else, arrays).
🎯
Addressing Modes
The 5 MIPS addressing modes + branch/jump address arithmetic.
🛠️
Live MIPS Encoder
Type an R/I/J instruction, get the 32-bit machine code.
🎯
Practice
MIPS exam problems with reveal-able solutions.
Quick summary
MIPS: RISC, 32-bit, byte-addressed. Word = 32 bits = 4 bytes.
Memory = 2^32 bytes (addr 0…2^32−1) = 2^30 words (addr 0,4,8,…2^32−4).
Word address = address of its first byte; low 2 bits of a word addr = 00.
THREE FORMATS (each 32 bits):
R | op6 | rs5 | rt5 | rd5 | shamt5 | funct6 | add,sub,and,or,slt
I | op6 | rs5 | rt5 | imm/offset 16 | lw,sw,addi,beq,bne
J | op6 | address 26 | j, jal
CORE: add/sub $rd,$rs,$rt · lw/sw $rt,off($rs) · beq/bne $rs,$rt,Label · j Label
R: rd=rs OP rt. lw $s1,100($s2): $s1=Mem[$s2+100].
5 ADDRESSING MODES: register · base(displacement) · immediate ·
PC-relative(beq/bne) · pseudodirect(j).
BRANCH: dest = (PC+4) + 4×offset ; offset = (dest − (PC+4))/4.
Max positive offset = 2^15 − 1. Last byte = 2^32−1, last word = 2^32−4.