UN

Live MIPS Encoder

Type one MIPS instruction; get the field breakdown and the 32-bit machine code. Supports R (add, sub, and, or, nor, slt, sll, srl), I (lw, sw, addi, andi, ori, slti, beq, bne) and J (j, jal).

R-type

000000op6 bits10001rs5 bits10010rt5 bits10000rd5 bits00000shamt5 bits100000funct6 bits
R-format encoding of “add $s0, $s1, $s2”
32-bit binary: 0000 0010 0011 0010 1000 0000 0010 0000
Hex: 0x02328020
Note: for beq/bne the offset is a number of instructions (words), and for j the address is a word address — enter those as plain numbers. Register numbers: $s0–$s7 = 16–23, $t0–$t7 = 8–15.