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MIPS Instruction Formats

“Draw all MIPS instruction formats” (Q3(a)). MIPS is RISC: every instruction is exactly 32 bits, and there are only three formats.

Overview

Simple instructions — all 32 bits wide · very structured, no unnecessary baggage · only three formats: R, I, J.

R-type (“R” for aRithmetic)

Register-to-register operations: add, sub, and, or, nor, slt. Example add $t0, $s1, $s2.

op6 bits0 – 5rs5 bits6 – 10rt5 bits11 – 15rd5 bits16 – 20shamt5 bits21 – 25funct6 bits26 – 31
R-format — 32 bits
FieldMeaning
opopcode — the operation. For R-type it is 000000.
rsfirst source register
rtsecond source register
rddestination register
shamtshift amount (0 unless a shift)
functfunction field — selects the exact operation (add, sub, …)

Meaning: rd = rs (op) rt. Note in assembly rd is written first, but in the encoding it sits after rs and rt.

I-type (“I” for Immediate)

Data transfer, immediates and branches: lw, sw, addi, andi, ori, slti, beq, bne. Example lw $t0, 1002($s2).

op6 bits0 – 5rs5 bits6 – 10rt5 bits11 – 15immediate / offset16 bits16 – 31
I-format — 32 bits
FieldMeaning
opopcode (e.g. lw = 100011, sw = 101011, beq = 000100, bne = 000101)
rsbase register (lw/sw) or first compare register (beq/bne)
rtdestination/source register being loaded, stored or compared
immediate16-bit constant, memory offset, or branch offset (signed)

J-type (“J” for Jump)

Unconditional jumps: j, jal. Example j Label.

op6 bits0 – 5address (target)26 bits6 – 31
J-format — 32 bits

The 26-bit field is a word address (word-relative). Example: j Label where address Label = 100 bytes = 25 words → the field holds 25 = 00…011001, with op = 000010.

Side-by-side

TypeFields (bits)Used by
Rop6 · rs5 · rt5 · rd5 · shamt5 · funct6add, sub, and, or, slt
Iop6 · rs5 · rt5 · imm16lw, sw, addi, beq, bne
Jop6 · address26j, jal
6+5+5+5+5+6=326+5+5+5+5+6 = 32 · 6+5+5+16=326+5+5+16 = 32 · 6+26=326+26 = 32. All three add up to 32 bits — that’s the RISC “fixed-length” property. Try encodings on the Live MIPS Encoder →