Exam Pattern & Cheat Sheet

CSE 214 midterm · Full marks 30 · 1 hr 30 min · answer all 3 questions. Four past papers analysed below — the skeleton barely changes.

The recurring skeleton

QCLOTopicWhat it asks (every semester)
Q1CO1Ch.1 + IASMoore’s law · IAS structure/memory/formats/size · IAS assembly + machine code · abstraction · embedded/IC generations
Q2CO3PerformanceCPU-time & CPI comparison · MIPS vs execution time · Amdahl’s Law (derive + numeric) · BIPS
Q3CO2MIPSaddressing modes · R/I/J formats · C → assembly → machine code · last byte/word · max offset
Master one worked example of each sub-type and you can answer the entire paper. Each solved past paper below is one click away.

Topic → where to study it

If the question is about…Go to
Moore’s law, translation hierarchy, RISC/CISC, abstractionCh.1 Concepts
IAS structure, memory size, formats, programsIAS chapter
CPI, MIPS pitfall, Amdahl, BIPSPerformance chapter
MIPS formats, addressing modes, encodingMIPS chapter

One-page formula cheat sheet

Performance
CPU time=IC×CPI×T=IC×CPIclock ratetotal cycles=IC×CPI\text{CPU time} = \text{IC} \times \text{CPI} \times T = \frac{\text{IC} \times \text{CPI}}{\text{clock rate}} \qquad \text{total cycles} = \text{IC} \times \text{CPI}
MIPS=ICexec time×106BIPS=ICexec time×109=clock rateCPI×109\text{MIPS} = \frac{\text{IC}}{\text{exec time} \times 10^{6}} \qquad \text{BIPS} = \frac{\text{IC}}{\text{exec time} \times 10^{9}} = \frac{\text{clock rate}}{\text{CPI} \times 10^{9}}
Amdahl: new time=(1F)+FSSpeedup=1(1F)+FSmax speedup=11F\text{Amdahl: new time} = (1 - F) + \frac{F}{S} \qquad \text{Speedup} = \frac{1}{(1 - F) + \dfrac{F}{S}} \qquad \text{max speedup} = \frac{1}{1 - F}
IAS
4096 words×40 bits4096 \text{ words} \times 40 \text{ bits} · address = 12 bits · size=40×212=163,840 bits=20,480 bytes=4096 words\text{size} = 40 \times 2^{12} = 163{,}840 \text{ bits} = 20{,}480 \text{ bytes} = 4096 \text{ words}
rows=2addr bits\text{rows} = 2^{\text{addr bits}} · addr bits=log2(rows)\text{addr bits} = \log_2(\text{rows}) · number word = 1 sign + 39 · instr word = 2×(op8+addr12)2 \times (\text{op}_{8} + \text{addr}_{12})
LOAD=00000001 · ADD=00000101 · SUB=00000110 · STOR=00100001 · LSH = ×2\times 2
MIPS
word = 32 bits = 4 bytes · byte-addressed · last byte = 23212^{32} - 1 · last word = 23242^{32} - 4
op6 bitsrs5 bitsrt5 bitsrd5 bitsshamt5 bitsfunct6 bits
R-format
op6 bitsrs5 bitsrt5 bitsimmediate16 bits
I-format
op6 bitsaddress26 bits
J-format
branch dest = (PC+4)+4×offset(\text{PC} + 4) + 4 \times \text{offset} · max offset = 21512^{15} - 1 · $s0..=16.. · $t0..=8..

Reference — IAS opcodes (the four you use)

InstructionOpcodeEffect
LOAD M(X)00000001AC = M(X)
ADD M(X)00000101AC = AC + M(X)
SUB M(X)00000110AC = AC − M(X)
STOR M(X)00100001M(X) = AC
LSH / RSH00010100 / 00010101AC ×2 / ÷2

Reference — MIPS opcodes / functs

InstrTypeopfunct
addR000000100000
subR000000100010
sltR000000101010
lwI100011
swI101011
beq / bneI000100 / 000101
addiI001000
j / jalJ000010 / 000011

Register numbers: $zero=0 · $v0–1=2–3 · $a0–3=4–7 · $t0–7=8–15 · $s0–7=16–23 · $t8–9=24–25 · $gp=28 · $sp=29 · $fp=30 · $ra=31.